【Qualifications】

1. Responsible for the design and development of the upper computer control software and GUI;
2. Responsible for upper computer software version iteration and maintenance;
3. Responsible for counting documents.

【Education/Experience】

1. majoring in computer, software engineering, or other science and technology, with bachelor degree or above;
2. solid C/C++ skills, some GUI development experience, familiar with Qt is preferred;
3. Good GUI aesthetics;
4. Strong sense of responsibility, good teamwork and communication skills.

【Qualifications】

1. Design analog circuits, such as Bandgap, LDO, PLL, ADC / DAC ;
2. Write the design and simulation report ;
3. Simulation chip testing.

【Education/Experience】

1. Bachelor degree or above in microelectronics / integrated circuit related majors ;
2. Familiar with integrated circuit design and manufacturing process ;
3. have a more solid basic knowledge of analog electronic circuits ;
4. master Hspice / Spectre simulation design tools ;
5. Cheerful personality, careful work.

【Qualifications】

1. Understand the working principle of the chip, output the chip CP test plan ;
2. CP test program development and debugging ;
3. To solve the CP test hardware problems, such as probe card schematic design, Layout check ;
4. Engineering batch chip test, output CP test report, test efficiency improvement program.

【Education/Experience】

1. Bachelor degree, major in electronics, physics, automation, microelectronics or other related ; 1 year and above chip ATE test experience, understand dToF, image sensor ATE test method, process is preferred ;
2. Have ATE test platform ( such as J750, chroma3380, etc. ) test program writing, test pattern import, machine operation experience ;
3. CP-related hardware import experience, such as probe card schematic design, Layout check ;
4. Have data statistical analysis ability, can use python, matlab and other data analysis software ;
5. Skillfully use common test instruments, such as multimeter, oscilloscope, waveform generator, etc. ;
6. Have strong learning ability, communication ability and problem analysis ability.

【Qualifications】

1. Responsible for completing the physical design of Netlist to GFDSII ;
2. Responsible for the writing and maintenance of relevant technical documents.

【Education/Experience】

Basic conditions :

1. Bachelor degree or above in computer, electronics, microelectronics, communications and other related majors ;
2. Familiar with the back-end design process and tools, with the experience of the entire back-end process from Netlist to GDSII.

Priority conditions :

1. Experience in SPI, I2C, MIPI CSI interface design ;
2. Successful tape-out experience.

【Qualifications】

1. responsible for writing RTL and netlist related verification documents for chip projects and developing module-level and system-level verification schemes for digital circuits;
2. perform module and SoC system level verification work using hardware design verification languages/tools such as Verilog, SystemVerilog, UVM/OVM/VMM verification methodologies to achieve efficient chip functionality;
3. improve verification environment and verification scripting tools (Shell/Perl/Tcl/Makefile), and maintain verification flow to work with chip design engineers to find and fix design defects;
4. completing RTL-level simulation and gate-level timing (with backscale) simulation to complete verification execution and Debug to meet TapeOut requirements;
5. Be able to generate test plans, generate code and functional coverage, and write verification reports according to project requirements.

【Education/Experience】

1. Electronics, communication, computer, microelectronics or physics and other related majors, bachelor degree or above ;
2. Familiar with digital IC design process, familiar with UVM / VMM / OVM verification methodology, master Verilog System Verilog / SVA hardware design verification language ;
3. Familiar with the Linux working environment, skilled use of scripting language design tools and environment development such as Makefile, Perl, Shell TCL ;
4. Skillfully use simulation and debugging tools, such as VCS, NCSIM, Verdi, etc. Have digital-analog hybrid verification experience, can build a hybrid simulation verification platform, and complete debugging ;
5. Has strong learning ability, communication ability and good teamwork spirit, excellent independent analysis and processing ability.

【Qualifications】

1.Participate in chip architecture design and SPEC development ;

2.Responsible for the digital front-end design and development work in the chip design project, including RTL design, RTL verification, formal verification, RTL synthesis, timing verification, DFT / ATPG, etc., to achieve chip function and performance requirements ;
3.Cooperate with the back-end engineer to complete the layout ; guide the back-end design and related inspection and post-simulation ;
4.participate in the development of chip test plan and support test engineers to complete chip test work ;

5.Responsible for the preparation of relevant technical documents.

【Education/Experience】

1. electronics, communications, computer, microelectronics or physics and other related professional ;
2.Proficiency in Verilog language programming, a solid foundation of digital circuits ;
3.Familiar with digital chip design and development process, skilled use of commonly used EDA tools, successful tapeout experience is preferred ;
4.Image sensor development experience, image processing algorithm, TDC / ADC calibration algorithm development experience is preferred ;
5.with strong learning ability, communication skills and good team spirit.